1. Field of the Invention
The present invention relates to a digital-to-analog converter and in particular to a method and apparatus for improving monotonicity in a digital-to-analog converter.
2. Description of the Related Art
A digital-to-analog converter (DAC) is an important device for many applications. A DAC is an analog circuit whose output characteristics are controlled by a digital control word. While the present invention is generally related to a DAC and can be practiced in a general-purpose DAC, it is particularly useful for a special application of a digitally controlled oscillator (DCO).
A DCO is a device that generates a periodic signal having a frequency controlled by a digital control word. A DCO usually comprises an adjustable circuit element whose value determines the oscillation frequency of the DCO. The digital control word is used to set the value of the adjustable circuit element and to determine the oscillation frequency. For example, an LC oscillator with an oscillation frequency of approximately
      f    osc    =      1          2      ⁢      π      ⁢              LC            can be implemented as a DCO with a fixed inductor L and a variable capacitor C. The capacitance value of the variable capacitor is controlled by a digital control word. The DCO is a special case of a DAC since it receives a digital control word and outputs an analog signal in response to the digital control word.
FIG. 1 depicts a typical digitally controlled variable capacitor 100 comprising a decoder 110, a fixed capacitor CF, a plurality of switched capacitors (e.g., C0, C1, C2) and a plurality of switches (e.g., S0, S1, S2). The decoder 110 receives a digital control word W and generates a plurality of binary data (e.g., D[0], D[1], D[2]) to respectively control the plurality of switches. The total effective capacitance of the variable capacitor 100 is Ceff=CF+C0·D[0]+C1·D[1]+C2·D[2]+ . . . . Thus, the oscillation frequency of an LC oscillator comprising the variable capacitor 100 is determined by the digital control word W.
There are three important characteristics concerning a DCO: range, resolution, and monotonicity. The range and the granularity of the values of the adjustable circuit element respectively determine the range and the resolution of the DCO. For example, the resolution of the aforementioned LC oscillator is determined by the minimum capacitance among the switched capacitors (e.g., C0, C1, C2) while the range is determined by the maximum total effective capacitance (e.g., Ceff (max)=CF+C0+C1+C2+ . . . ) and the minimum total effective capacitance (e.g., Ceff (min)=CF). The monotonicity of the DCO is met if the value of the adjustable circuit element changes consistently (e.g., increases or decreases as the digital control word increases or decreases). For example, the monotonicity of the above mentioned LC oscillator is met if a greater control word results in a greater total effective capacitance.
A DCO is usually incorporated in a digital phase lock loop (DPLL) to generate an output clock of a target frequency. A digital control word for the DCO is established in a closed-loop manner to control the oscillation frequency of the DCO. The digital control word has a limited resolution and so the instantaneous oscillation frequency of DCO also has a limited resolution. In practice, the instantaneous oscillation frequency of the DCO is unlikely to be exactly the same as the target frequency. A prior art DPLL usually requires a strictly monotonic DCO to ensure stable operations. For example, in an application in which a greater digital control word corresponds to a greater output frequency, the DPLL will seek to decrease the digital control word to decrease an output frequency that is higher than the target frequency or increase the digital control word to increase an output frequency that is lower than the target frequency. In a steady state of a stable DPLL, the digital control word usually fluctuates between two values, one corresponding to an output frequency slightly higher than the target frequency and another corresponding to an output frequency slightly lower than the target frequency such that an average output frequency is approximately equal to the target frequency.
Fluctuations in the digital control word results in unwanted jitters in the output clock. The jitters can be reduced by increasing the resolution of the DCO such that the instantaneous oscillation frequency can be closer to the target frequency. A DPLL, however, is subject to disturbance due to noise and the digital control word may momentarily drift away from its steady state values in response to the disturbance. Fortunately, the effect of the disturbance is only temporary if the DCO is monotonic. For example, if the digital control word drifts higher (or lower) due to a disturbance, the DPLL will detect that the output frequency is too high (or too low) and will decrease (or increase) the average value of the digital control word to correct the error. If the DCO is not strictly monotonic, the DPLL may adjust the digital word in an erroneous direction and cause increased jitters or loop instability.
One way to guarantee strict monotonicity in a DCO is to use a thermometer-code decoding scheme. Table 1 illustrates one example of a thermometer-code decoding scheme for mapping a digital control word W into eight binary data (e.g., D0, D1, . . . D7). Referring to the aforementioned LC oscillator by way of example, every incremental change in the digital control word W results in an additional control bit turning on to increase the total effective capacitance. Thus, monotonicity is guaranteed. It is generally difficult to ensure monotonicity without using the thermometer-code decoding scheme. The thermometer-code decoding scheme, however, usually requires a very high number of switched capacitors. What is needed is a DCO with a reduced number of switched elements and that still virtually guarantees monotonicity.
TABLE 1W012345678D[0]011111111D[1]001111111D[2]000111111D[3]000011111D[4]000001111D[5]000000111D[6]000000011D[7]000000001